Conventionally, as a field emission-type electron source (hereinafter, simply referred to as “electron source”), for example, there is known a Spindt type electrode disclosed in U.S. Pat. No. 3,665,241 or the like. The Spindt type electrode includes a substrate having a number of fine triangular pyramid shaped emitter chips disposed thereon; and a gate layer which is insulated relevant to the emitter chips and has emission holes for exposing the tip ends of the emitter chips. The Spindt type electrode emits electron beams through the emission holes from the tip ends of the emitter chips by applying a high voltage so that the emitter chips are negative in polarity relevant to the gate layer.
However, the Spindt type electrode is complex in manufacturing process, and it is difficult to precisely fabricate a number of triangular pyramid shaped emitter chips. Thus, for example, in the case where this is applied to a planar light emitter or display, there is such a problem that it is difficult to make its surface area larger. In addition, in the Spindt type electrode, the electric field concentrates on the tip ends of the emitter chips. Thus, in the case where the degree of vacuum around the tip ends of the emitter chips is low so that the residual gas exists, the residual gas is ionized to positive ions by means of the emitted electrons. The positive ions collide to the tip ends of the emitter chips so that the tip ends of the emitter chips are subjected to damage (for example, damage due to ion shock). Thus, there occurs such a disadvantage that the current density or emission efficiency of the emitted electrons becomes unstable, and the service lives of the emitter chips are reduced. Therefore, in order to prevent the above-mentioned disadvantage, it is required to use the Spindt type electrode in a high vacuum (about 10−5 Pa to about 10−6 Pa) condition. As the result, there is a problem that higher cost or complicated handling may result.
In order to improve the above-mentioned disadvantage, there is proposed an electron source of an MIM (Metal Insulator Metal) type or MOS (Metal Oxide Semiconductor) type. The former is a planar type electron source having a deposited structure of metal—insulating film—metal, while the latter is a planar type electron source having a deposited structure of metal—oxide film—semiconductor. In an electron source of such type, in order to improve the electron emission efficiency (that is, in order to emit much electrons), it is required to reduce the thickness of an insulating film or oxide film. However, if the thickness of the insulating film or oxide film is too small, there is a danger that insulation destruction occurs when a voltage is applied between the upper and lower electrodes of the deposited structures. Such insulation destruction must be prevented, and thus, there is a limitation in reduction of the thickness of the insulating film or oxide film. Thus, there is a problem that electron emission efficiency (lead-out efficiency) cannot be increased so much.
In recent years, there is proposed an electron source (semiconductor cool electron emission element) with its high electron emission efficiency so as to apply a voltage between a semiconductor substrate and a surface electrode, thereby emitting electrons. In the electron source, one surface of a single-crystalline semiconductor substrate such as silicon substrate is anodically oxidized, thereby forming a porous semiconductor layer (porous silicon layer). Then, on the porous semiconductor layer, a surface electrode consisting of a metal thin film (electrically conductive thin film) is formed.
However, in the electron source disclosed in Japanese Laid-open Patent Publication No. 8-250766, a popping phenomenon is likely to occur during electron emission, and non-uniformity is likely to occur in electron emission quantity. Thus, if this is applied to a planar light emitter or display device, there is a problem that non-uniform light emission is produced.
In order to solve the above-mentioned problems, for example in Japanese Patent Applications No.10-272340 and No. 10-272342 etc., the present inventors proposed an electron source in which a strong field drift layer (hereinafter simply referred to as “drift layer”) where electrons injected from the electrically conductive substrate drift is interposed between the electrically conductive substrate and the metal thin film (surface electrode).
For example, as shown in FIG. 38, in an electron source 10′ of such type, a drift layer 6 consisting of an oxidized porous polycrystalline silicon layer (porous polycrystalline silicon layer) on a main surface side of an n-type silicon substrate 1 that is an electrically conductive substrate. A surface electrode 7 consisting of a metal thin film (for example, metal film) is formed on the drift layer 6. In addition, an ohmic electrode 2 is formed on the back face of an n-type silicon substrate 1. A lower electrode 12 (electrically conductive substrate) is composed of the n-type silicon substrate 1 and ohmic electrode 2. In an example shown in FIG. 38, although a non-doped polycrystalline silicon layer 3 is interposed between the lower electrode 12 and the drift layer 6, there is proposed an electron source having the drift layer 6 formed on the lower electrode 12.
Then, a collector electrode 21 consisting of a transparent electrically conductive film (for example, ITO film) is disposed in opposite to the surface electrode 7. In order to emit an electron from the electron source 10′, while a vacuum is provided between the surface electrode 7 and the collector electrode 21, a direct current voltage Vps is applied between the surface electrode 7 and the lower electrode 12 so that the surface electrode 7 becomes high in potential relevant to the lower electrode 12. In addition, a direct current voltage Vc is applied between the collector electrode 21 and the surface electrode 7 so that the collector electrode 21 becomes high in potential relevant to the surface electrode 7. When direct current voltages Vps and Vc are properly set, electrons injected from the lower electrode 12 drift in the drift layer 6, and are emitted via the surface electrode 7 (the single dotted chain line in FIG. 38 indicates the flow of electrons “e-” emitted through the surface electrode 7). The thickness of the surface electrode 7 is set to about 3 nm to 15 nm.
In the drift layer 6, after a non-doped polycrystalline silicon layer has been formed on the lower electrode 12, the polycrystalline silicon layer is made porous in accordance with anodic oxidization processing, thereby forming a porous polycrystalline silicon layer. Thus porous polycrystalline silicon layer is formed in accordance with a rapid thermal oxidizing technique for carrying out rapid thermal oxidization at 900° C., for example.
As shown in FIG. 39, the drift layer 6 includes: at least columnar polycrystalline silicon grains 51; thin insulating films 52; a number of silicon nanocrystals 63 of nano-meter order; and a number of insulating films 64. The grains 51 are arranged on the main surface side of the n-type silicon substrate 1 (namely, the surface electrode 7 side in the lower electrode 12). The insulating films 52 are formed on the surfaces of the grains 51. The silicon nanocrystals 63 are interposed among the grains 51. The insulating films 64 are formed on the surfaces of the silicon nanocrystals 63, each of which has a film thickness smaller than the crystalline particle size of the silicon nanocrystal 63. In short, in the drift layer 6, the surface of each grain 51 in the polycrystalline silicon layer is made porous, and a crystalline state is maintained at the center portion of each grain 51. Each grain 51 extends in the thickness direction of the lower electrode 12. Insulating films 52 and 64 are composed of silicon oxide films.
In the electron source 10′, it is believed that electron emission occurs in the following model. That is, during electron emission, a direct current voltage Vps having the surface electrode 7 provided as a high potential is applied between the surface electrode 7 and the lower electrode 12, and a direct current voltage Vc having the collector electrode 21 provided as a high potential is applied between the collector electrode 21 and the surface electrode 7. When the direct current voltage Vps reaches a predetermined value (critical value), the electrons “e-” are injected from the lower electrode into the drift layer 6 due to thermal excitation. On the other hand, a majority of the electron field applied to the drift layer 6 is applied to the insulating films 64. Thus, the injected electrodes “e-” are accelerated by the strong electric field applied to the insulating films 64. Then, the electrons “e-” drift in the drift layer 6 in an orientation indicated by the arrow A in FIG. 39 from a region between the grains 51 toward the surface, tunnel the surface electrode 7, and are emitted into the vacuum.
In this manner, in the drift layer 6, the electrons injected from the lower electrode 12 are accelerated and drift in the electric field applied to the insulating films 64 without being hardly diffused at the silicon nanocrystals 63. Then, the electrons are emitted via the surface electrode 7 (ballistic type electron emission phenomenon). At this time, a heat generated in the drift layer 6 is radiated via the grains 51. Thus, popping phenomenon does not occur during electron emission, and the electrons can be constantly emitted. The electrons arrived at the surface of the drift layer 6 are believed to be hot electrons. The electrons easily tunnel the surface electrode 7, and are emitted into the vacuum.
In the meantime, in the electron source 10′, the lower electrode 12 is composed of the n-type silicon substrate 1 and ohmic electrode 2. However, as shown in FIG. 40, for example, there is proposed an electron source 10″ in which the lower electrode 12 consisting of a metal material is formed on one surface of an insulating substrate 11 consisting of a glass substrate. In FIG. 40, constituent elements common to the electron source 10′ shown in FIG. 38 are designated by like reference numbers. A description thereof is omitted here. In the electron source 10″ shown in FIG. 40 as well, electrons can be emitted in a process similar to a case of the electron source 10′ shown in FIG. 38.
In the electron sources 10′ and 10″, in general, a current flowing between the surface electrode 7 and the lower electrode 12 is referred to as a diode current Ips, and a current flowing between the collector electrode 21 and the surface electrode 7 is referred to as an emission current (emission electron current) Ie. As a rate (Ie/Ips) of the emission current Ie to the diode current Ips increases, electron emission efficiency ((Ie/Ips)×100[%]) increases. In the electron sources 10′ and 10″, even if the direct current voltage Vps applied between the surface electrode 7 and the lower electrode 12 is defined as a low voltage of about 10 V to 20 V, electrons can be emitted. In addition, as the direct current voltage Vps increases, the emission current le increases.
In the meantime, in a process for manufacturing the electron sources 10′ and 10″, the step of forming the drift layer 6 consists of the film forming step, anodic oxidization processing step, and oxidizing step. In the film forming step, a non-doped polycrystalline silicon layer is formed as a semiconductor layer on one surface of the lower electrode 12. In the anodic oxidization processing step, a polycrystalline silicon layer is made porous in accordance with anodic oxidization processing step, thereby forming a porous polycrystalline silicon layer that contains the polycrystalline silicon grains 51 and silicon nanocrystals 63. In the anodic oxidization processing step, there is employed a mixture solution obtained by mixing a hydrogen fluoride water solution and ethanol at substantially 1:1 as an electrolytic solution employed for anodic oxidization. In the oxidizing step, the porous polycrystalline silicon layer is rapidly thermally oxidized in accordance with the rapid thermal oxidization technique that is a high temperature process, and thin insulating films (silicon oxide films) 52 and 64 are formed respectively on the surfaces of the grains 51 and silicon nanocrystals 63.
In addition, as shown in FIG. 41, in the oxidizing step, a substrate temperature is risen from room temperature to a heat treatment temperature (for example, 900° C.) in dry oxygen by employing a lamp annealing device, for example. Then, the substrate temperature is held at this heat treatment temperature by a predetermined heat treatment time (for example, 1 hour), thereby oxidizing the porous polycrystalline silicon layer. Then, the substrate temperature is lowered to room temperature.
There is proposed an electron source formed of a nitride porous polycrystalline silicon layer instead of an oxidized porous polycrystalline silicon layer. Further, there is proposed an electron source formed of the oxidized or nitrided porous single-crystalline silicon layer as well.
In a conventional electron source comprising such a drift layer, it is possible to increase an area and to ensure cost reduction. In the case where an electron source of such type is applied as an electron source of a display, the surface electrode or lower electrode (electrically conductive substrate) may be properly patterned. However, in such a conventional electron source, the following problems occur.
(Problem 1)
In the conventional electron source of such type, there is a problem that there increases a deviation in characteristics such as electron emission efficiency, dielectric strength, service life between manufactured lots. As a result of detailed study of such cause, it has been found that this deviation is caused by a deviation in thickness of the silicon oxide film that is an insulating film.
(Problem 2)
As has been described previously, a rapid thermal oxidization technique is employed in the oxidizing step. However, in order to form the silicon oxide films 52 and 64 with their good film quality on the surface of all the grains 51 and silicon nanocrystals 63, there can be employed the oxidizing step for oxidizing a porous polycrystalline silicon layer in an electrolytic solution consisting of water solution such as sulfuric acid or nitric acid in accordance with an electrochemical oxidization technique.
By employing the electrochemical oxidization technique, a process temperature can be reduced as compared with the case of employing the rapid thermal oxidization technique. Thus, a resistance on a substrate material is reduced. In the case of employing a glass substrate, a non-alkali glass substrate or low alkali glass substrate and the like with its low heat resistance temperature and modest price can be employed as compared with a quartz glass substrate. Therefore, there is an advantage that a larger area for the electron sources 10′ and 10″ and cost reduction can be achieved more efficiently.
However, in the conventional electron source manufactured by oxidizing the porous polycrystalline silicon layer in accordance with an electrochemical oxidization technique, there is a problem that the dielectric strength is low as compared with the electron source oxidized and manufactured in accordance with the rapid thermal oxidization technique. This is because an SiO2 film formed in accordance with the electrochemical oxidization technique is much in water content or strain as compared with that formed in accordance with the rapid thermal oxidization technique. In the electron sources 10′ and 10″ manufactured by oxidizing the porous polycrystalline silicon layer in accordance with the rapid thermal oxidization technique as well, it is desired that the electron emission efficiency, dielectric strength, and service life be improved more remarkably. However, as the result of a variety of analytical evaluations (such as photo luminescence measurement, sectional TEM observation, or XPS composition analysis, for example) regarding the drift layer 6, the following findings were obtained. That is, the film thickness of the silicon oxide film 64 increases as the film is closer to the surface of the drift layer 6, the silicon nanocrystal 63 is destroyed, and the silicon nanocrystal 63 does not exist in the vicinity of the surface of the drift layer 6. Thus, in the conventional electron sources 10′ and 10″, there is a danger that a part of the electrons injected into the drift layer 6 are diffused or captured by the silicon oxide film 64 which is larger than the film thickness (degree of mean free path of electrons) to an extent such that an electron tunneling phenomenon occurs. In this case, there is a danger that the electron emission efficiency is lowered, and the dielectric strength and service life is reduced.
(Problem 3)
In anodic oxidization processing, a mixture solution between hydrogen fluoride water solution and ethanol is utilized as an electrolytic solution. Thus, as shown in FIG. 42, the porous polycrystalline silicon layer formed in accordance with anodic oxidization processing is terminated by a hydrogen atom on its top surface. Further, it is believed that water is adsorbed on the surface of the porous polycrystalline silicon layer.
If the porous polycrystalline silicon layer formed in accordance with anodic oxidization processing is oxidized on a temperature profile as shown in FIG. 41, a hydrogen atom remains or Si—OH coupling occurs, as shown in FIG. 43. Thus, there is a problem that an oxide film with its fine structure consisting of SiO2 is hardly produced, and the dielectric strength is lowered. Further, there is a problem that a fluorine atom as well remains in the drift layer 6 other than the hydrogen atom. In addition, the content of hydrogen in the drift 6 is comparatively large in quantity. Thus, there is a danger that the distribution of hydrogen in the drift layer 6 changes with an elapse of time (for example, a hydrogen atom desorbs from the surface of the drift layer 6), and the stability of electron emission efficiency with an elapse of time is impaired.
(Problem 4)
When a comparatively inexpensive glass substrate (such as no-alkali glass substrate, a low alkali glass substrate, or soda lime glass substrate, for example) is employed as an insulating substrate 11 in the electron source 10″, as compared with a quartz glass substrate, although a heat resistance temperature of the insulating substrate 11 is lowered, cost reduction can be achieved. Because of this, it is believed that the temperature of forming the porous silicon layer is lowered (for example, set to 600° C. or less).
However, in the case of forming the polycrystalline silicon layer at a comparatively low temperature, the crystalline properties of the polycrystalline silicon layer is impaired as compared with the polycrystalline silicon layer formed at a comparatively high temperature, and a large number of defects occurs. As a result, there is a problem that a number of defects contained in the drift layer 6 increases, the electron emission characteristics are impaired, and the reliability is lowered. For example, if a defect exists in the silicon oxide films 52 and 64 each in the drift layer 6, the dielectric strength of the silicon oxide films 52 and 64 each is lowered, and the dielectric strength of the electron source is lowered. Alternatively, the electron emission efficiency is lowered because of electron diffusion.
(Problem 5)
In the conventional electron sources 10′ and 10″, in the case where these sources are continuously driven for a long time, there is problem that the diode current Ips decreases with an elapse of time, and concurrently, the emission current Ic decreases as well. As a cause thereof, it is believed that an electron is captured by a trap in an insulating film 64, an electric field in the insulating film 64 is alleviated, and the tunneling probability of electrons is lowered.
Further, in the above-described manufacturing method, there is employed a process requiring a comparatively high heat treatment temperature (for example, 900° C.) and a comparatively long heat treatment time (for example, 1 hour) in the oxidizing step. Thus, there is a problem that the process time is extended. Further, there is a problem that a non-alkali glass substrate or low alkali glass substrate with its low heat resistance temperature, which is comparatively inexpensive as compared with a quartz glass substrate, can not be employed as an insulating substrate 11.
(Problem 6)
In the conventional electron sources 10′ and 10″, although an electron can be emitted constantly with high efficiency, it is desired to more remarkably improve the electron emission characteristics such as electron emission efficiency or the reliability such as dielectric strength. However, in the electron sources 10′ and 10″, it is believed that there exists a defect caused by a manufacturing process in the drift layer 6. For example, in the case where a defect exists in the silicon nanocrystal 63 or silicon oxide films 52 and 64 and the like, there is a problem that the lowering of electron emission efficiency due to electron diffusion or the lowering dielectric strength and the like is caused.